1. Field of the Invention
The present invention relates to a digital conference trunk system and particularly to a digital conference trunk system which employs a memory used both for input and output.
2. Description of the Related Art
FIG. 1 is a block diagram illustrating the basic constitution of a digital exchange. In an ordinary speech between a telephone 101 and a telephone 108, for example, data sent from the telephone 101 passes through a line circuit LC1 and a highway HW and is inputted to a network NW. After the highway HW being connected to the destination telephone circuit by the switching operation of the network NW, the data from the telephone 101 passes the highway HW again and a line circuit LC2, and is received by the telephone 105.
The digital exchange is of time-division switching type, where time-division multiplexed serial data of a plurality of circuits is carried in the highway HW, with a time slot allocated to each telephone circuit. The serial data is input ted to the line circuits LC1 or LC2, or to a conference trunk equipment TRK.
In an add-on with the conference trunk equipment TRK among telephones 101, 102 and 105 For example, data sent from each telephone circuit passes through the highway HW to be inputted to the network NW and, after the highway HW is connected to the destination telephone circuit by the switching operation of the network NW, the data from each telephone circuit is inputted to the conference trunk equipment TRK to be mixed. After being mixed, the data is sent via the network NW and the line circuits LC1 and LC2 again, and data from the telephones 102 and 105 is received by the telephone 101, data from the telephones 101 and 105 is received by the telephone 102, and data from the telephones 101 and 102 is received by the telephone 105.
In addition to the use in such a conference as described above, the conference trunk equipment may be used in an attendant transfer by an operator in a hotel or the like, where among an outside line, the operator and a telephone in a guest room temporarily form an add-on condition when the operator transfers data received from the outside line to the guest room.
FIG. 2 is a block diagram illustrating an outline of a conventional digital conference system. FIG. 3 through FIG. 7 are timing charts thereof.
Input highway data dn (n: 0, 1, . . . , 15) is serially transmitted by a time slot TSn (8 bits per 1 time slot) with a band width of a quarter of a specified frequency N (if N=1MHz, for example, N/4=256KHz) and is serially stored in shift registers 90n. Because eight bits are transmitted by one time slot, data is shifted in a direction from 90.sub.15 to 90.sub.14 to 90.sub.13, and so on bit by bit by the main clock having a frequency 2N (if N=1MHz, for example, 2N=2MHz).
When all pieces of data of 16 time slots TS0 through TS15 are stored in the respective shift registers 90.sub.0, 90.sub.1, . . . , 90.sub.15 (FIG.3(b), FIG.4(b)), a data selector 80 reads data of P time slots (P is the number of circuits which can attend a conference supported by a conference system), that is the data d.sub.0, d.sub.1, d.sub.2, d.sub.3 of the time slots TS0, TS1, TS2, TS3 from the respective shift registers 90.sub.0 through 90.sub.3 in the example, in a period of two time slots ( FIG. 5 (a)), to input the read data to an addition/subtraction circuit 70 via a P/L conversion means 30a, which converts data from PCM to linear (FIG. 5(c)). The addition/subtraction circuit 70 adds up the input highway data dn successively to obtain the sum da=d.sub.0 +d.sub.1 +d.sub.3 +d.sub.3 in the time snot TS17.
In the following two time slots (TS18, TS19), the sum da and the data d.sub.0, d.sub.1, d.sub.2, d.sub.3 of each slot are used to calculate the output highway data D.sub.0 =d.sub.1 +d.sub.2 +d.sub.3, D.sub.0 =d.sub.1 +d.sub.2 +d.sub.3, D.sub.2 =d.sub.0 +d.sub.1 +d.sub.3, D.sub.3 =d.sub.0 +d.sub.1 +d.sub.2, which are to be outputted in the respective time slots (TS0 through TS3).
The output highway data Dn thus calculated is temporarily stored in output shift registers 60n via an L/P conversion means 30b, which converts data from linear to PCM. At this time, upon receipt of a signal from a decoder 40, the shift registers 60n are opened in the order from 60.sub.0 to 60.sub.1 to 60.sub.2 and so on, to store the specified output highway data Dn in the specified registers 60.sub.n.
Then the input highway data d.sub.4 through d.sub.7 of the subsequent four slots (TS4, TS5, TS6, TS7) are processed to obtain output data D.sub.4 =d.sub.5 +d.sub.6 +d.sub.7, D.sub.5 =d.sub.4 +d.sub.6 +d.sub.7, D.sub.6 =d.sub.4 +d.sub.5 +d.sub.7, and D.sub.7 =d.sub.4 +d.sub.5 +d.sub.6 which is to be outputted to the corresponding register 60n (time slots TS20 through TS23). Remaining two sets of highway data (d.sub.8 through d.sub.11) and (d.sub.12 through d.sub.15) are also processed successively in the time slots (TS24 through TS27) and (TS28 through TS31).
When all shift registers 60.sub.0 through 60.sub.15 receive the output highway data Dn, the data is sequentially outputted by shifting the shift registers 60n, and the next input highway data dn is inputted at the same time.
Usually, two sets of the unit described above are installed, with one shift register 60 processing the highway data of the time slots 0 through 15 and another unit processing the highway data of the time slots 16 through 31.
In FIG. 2, various timing signals are generated in a clock generator 50.
In the above case, a conference trunk is a four circuits set. When a conference trunk is formed of an eight circuits set, input highway data dn of eight time slots is read at a time and is subjected to addition/subtraction operations, instead of data dn of four time slots.
The principle of switching the trunk equipment of the four circuits set to the trunk equipment of the eight circuits set, is to change the timing signal which controls the selector 80.
According to the conventional system provided with shift registers 90n, 60n (buffer memories) provided on the input and output sides as above, the input side shift register 90n converts the input highway data dn to parallel data by sequentially shifting the data which is inputted as serial data, while the output side shift register 60n outputs the output highway data Dn as serial data by shifting the data which is inputted as parallel data. Therefore, because the shift registers 90n and 60n have different functions, both the registers cannot be replaced with a single memory.
As a result, the system has such a defect as to require buffer memories on the input side and the output side, respectively, which results in greater size and higher costs.
Also switching the trunk equipment for four circuits to that for eight circuits requires to change the timing signals outputted from the timing circuit 50. However, such switching construction with the conventional circuit requires too many parts to be mounted on a package. So that, two packages for the four circuits and eight circuits are separately prepared which are selected by a switch. This results in the system of further larger size and with larger number of parts, thereby to raise manufacturing cost.